Answer:
- 5 ns
- 10 ns
- 12 ns
- 10 ns
Explanation:
propagation delays are largest delays in a specified path
ATTACHED IS THE TRUTH TABLE AND FREE BODY DIAGRAM
From the truth table of a full adder
when D1 D0 = 00 it means that SUM = carry in and carry out = 0
when D1 D0 = 01 it means that SUM = carry in' and carry out = carry in
when D1 DO = 10 it means that SUM = carry in' and carry out = carry in
when D1 D0 = 11 it means that SUM = carry in and carry out = 1
- propagation delay for CARRY-IN to CARRY-OUT
= delay of 2 mux from input to output = 5 ns
- propagation delay for DATA to CARRY-OUT
= delay of 3^rd mux from select lines to output = 10 ns
- propagation delay for CARRY-IN to SUM
= delay inverter + delay of first mux from input to output
= 7 + 5 = 12 ns
- propagation delay for DATA to SUM
= delay of first mux from select line to output
= 10 ns
